1. Hierarchical modeling for VLSI circuit testing
Author: Bhattacharya, Debashis
Library: Central Library and Information Center of Ferdowsi University of Mashhad (Khorasan Razavi)
Subject: Very large scale integration - Testing ، Integrated circuits,Very large scale integration - Computer simulation ، Integrated circuits
Classification :
TK
7874
.
B484
1990
2. Hierarchical modeling for VLSI circuit testing
Author: Bhattacharya, Debashis
Library: Central Library of Sharif University of Technology (Tehran)
Subject: ، Integrated circuits-- Very large scale integration-- Testing,، Integrated circuits-- Very large scale integration-- Computer simulation
Classification :
TK
7874
.
B484
1990
3. Unified methods for VLSI simulation and test generation
Author: by Kwang-Ting Cheng and Vishwani D. Agrawal
Library: Central Library and Information Center of Shahed University (Tehran)
Subject: Integrated circuits- Very large scale integration- Computer-aided design,Integrated circuits- Very large scale integration- Testing,Integrated circuits- Very large scale integration- Computer simulation
Classification :
TK
،
7874
،.
C525
،
1989
